Integrity and Reliability of Integrated CircuitS (IRIS), Phase III | Apply Online

IRIS Phase III (DARPA MTO) Grant Opportunity FAQs

1) What is the IRIS Phase III opportunity?

Integrity and Reliability of Integrated CircuitS (IRIS), Phase III is a DARPA Microsystems Technology Office (MTO) research solicitation focused on improving understanding and prediction of the long-term reliability of advanced CMOS technologies.

2) What is the main purpose of IRIS Phase III?

The core purpose is to fund a comprehensive investigation into how extreme physical stresses influence wear-out and aging mechanisms in CMOS field-effect transistors (FETs) built at the 28 nm and/or 14 nm lithography nodes. A key theme is moving beyond purely observational reliability studies by deliberately stressing devices and interconnects to reveal and understand the degradation pathways that limit real-world lifetime and trusted operation.

3) Which technology nodes are in scope?

The solicitation centers on CMOS technologies at the 28 nm and/or 14 nm lithography nodes.

4) Is the focus only on transistors, or also on interconnects?

It explicitly includes both. One of the program goals is to characterize and model aging effects not only in transistors, but also in the metallization and interconnect stack, reflecting that modern IC reliability can be limited by wiring and contacts as much as by the transistors.

5) What are the two main technical goals of IRIS Phase III?

The opportunity is framed around two linked goals:

• Characterize and model aging effects in both transistors and the metallization/interconnect stack.
• Determine how precisely and how quickly specific wear-out mechanisms can be intentionally triggered (or "asserted") under controlled conditions.

6) What does it mean to "assert" wear-out mechanisms?

Within the context provided, "asserting" wear-out means intentionally triggering specific degradation or failure mechanisms using controlled stress methods, rather than waiting for aging to occur naturally over long periods.

7) How does accelerated burn-in relate to this program?

The solicitation highlights interest in whether targeted stress methods can produce faster, more diagnostic reliability assessments than traditional qualification techniques, while still mapping accurately to field failure modes. This aligns with accelerated burn-in and aging approaches that aim to speed up and improve reliability evaluation.

8) What types of stresses are expected to be studied?

The program emphasizes "extreme physical stresses" and suggests proposals should consider aggressive operating regimes and environmental and/or electrical stress conditions that accelerate the physics of aging, while still allowing credible extrapolation back to normal operating conditions.

9) What kinds of deliverables is DARPA looking for?

A major expected outcome is predictive modeling. The program points toward models that connect applied stress conditions to observable degradation signatures and eventual failure, with enough fidelity to forecast reliability under realistic use profiles. This implicitly includes identifying dominant mechanisms at the relevant nodes, understanding interactions among stressors, and validating models with experimental data.

10) What is meant by "predictive modeling" in this solicitation?

Based on the description provided, predictive modeling refers to building and validating models that relate applied stress conditions to measurable degradation indicators and failure outcomes, so reliability can be forecast under realistic operating profiles rather than only measured after long observation periods.

11) What DARPA office is sponsoring this opportunity?

This is a DARPA Microsystems Technology Office (MTO) solicitation.

12) What is the BAA number for this opportunity?

The opportunity was issued under DARPA BAA 15-47.

13) What is the CFDA number associated with this program?

The CFDA number listed is 12.910 (Research and Technology Development).

14) What is the assistance listing category?

It was categorized under Science and Technology and other Research and Development.

15) Is this opportunity discretionary?

Yes. The listing described the opportunity as discretionary.

16) What types of award instruments may be used?

The listing states DARPA allowed multiple award instruments, including cooperative agreements, grants, other procurement contracts, and standard procurement contracts. This gives DARPA flexibility in structuring awards and performer relationships.

17) Who is eligible to apply?

Eligibility was described as unrestricted, meaning it was generally open to any type of entity, subject to any additional constraints in the full announcement text.

18) Is cost sharing or matching required?

No. The listing states no cost sharing or matching was required.

19) When was the solicitation posted?

The solicitation was posted and created on July 17, 2015.

20) What was the closing date for submissions?

The original and current closing date shown was September 4, 2015.

21) When was the opportunity archived?

The archive date listed was March 4, 2016.

22) Does the listing specify an award floor or ceiling?

No. Both the award floor and award ceiling were shown as 0. This typically indicates that funding levels and the number or size of awards would be determined based on proposal quality, program priorities, and available budget, as detailed in the full BAA.

23) Where do applicants find the official announcement and submission instructions?

The opportunity directed applicants to the DARPA solicitations page and stated that the full technical scope, submission instructions, evaluation criteria, and any specific topic areas or metrics would be contained in the DARPA BAA 15-47 document.

24) Who is the point of contact for questions or help obtaining the full announcement?

The listing provided this point of contact: Mr. Kerry Bernstein, Program Manager, Microsystems Technology Office, BAA Coordinator.

25) What key technical areas appear to be important based on the description?

Based on the provided summary, key areas include: aging and wear-out mechanisms in CMOS FETs at 28 nm/14 nm, reliability limits from metallization and interconnect stacks, controlled stressing to trigger specific mechanisms, linking stress to degradation signatures, and validating predictive models against experimental results.

26) Does the summary include evaluation criteria or topic-specific metrics?

No. It notes that evaluation criteria, detailed submission requirements, specific topic areas, and metrics would be provided in the referenced DARPA BAA 15-47 document.