Opportunity Information: Apply for 16 526

  • The NSF in the science and technology and other research and development sector is offering a public funding opportunity titled "Energy-Efficient Computing: from Devices to Architectures" and is now available to receive applicants.
  • Interested and eligible applicants and submit their applications by referencing the CFDA number(s): 47.041, 47.070,.
  • This funding opportunity was created on Dec 30, 2015 and posted on Dec 30, 2015.
  • Applicants must submit their applications by Mar 28, 2016. (Agency may still review applications by suitable applicants for the remaining/unused allocated funding in 2026.)
  • Each selected applicant is eligible to receive up to $1,600,000.00 in funding.
  • The number of recipients for this funding is limited to 8 candidate(s).
  • Eligible applicants include: Others (see text field entitled Additional Information on Eligibility for clarification).
Apply for 16 526

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Opportunity Summary:

The Energy-Efficient Computing: from Devices to Architectures opportunity (NSF Funding Opportunity Number 16-526) is a joint research grant program led by the National Science Foundation (NSF) in partnership with the Semiconductor Research Corporation (SRC). It targets a widely recognized bottleneck in modern computing: meaningful performance gains are increasingly constrained by the energy required to process, store, and especially move data. In practical terms, the program is responding to the reality that energy consumption, heat, and data-movement costs are now limiting progress across many computing platforms, from small devices to large-scale systems, and that incremental, conventional improvements are no longer enough to keep pace with demand.

The central theme of the solicitation is that genuinely disruptive advances are needed across the entire computing stack, not just within a single layer like materials, devices, circuits, architecture, or software. The program emphasizes that the problem is too interconnected for isolated breakthroughs to translate into real-world impact. Instead, it calls for revolutionary approaches at multiple levels of the hierarchy paired with simultaneous co-optimization, meaning teams should intentionally design solutions that work together across layers (for example, aligning new device concepts with circuit techniques, architectural dataflow choices, and system/software approaches so the overall platform energy drops in a measurable way). The solicitation frames this as both a technical challenge and an organizational one, arguing that solving it will require new models of collaboration that bring together communities that do not always co-design in a tightly integrated way.

A major focus is minimizing the energy cost of three core computing functions: processing data, storing data, and transporting data within future systems. Notably, the emphasis on transport reflects the increasing share of total energy being spent on communication (moving bits across a chip, between chips, and through memory hierarchies), not just on arithmetic operations. The opportunity explicitly encourages cross-disciplinary teams that may include programmers, system architects, circuit designers, chip processing engineers, materials scientists, and computational chemists, with the expectation that they will jointly explore and co-design end-to-end solution paths rather than advancing disconnected components.

From an administrative standpoint, this is a discretionary grant opportunity in the Science and Technology and other Research and Development category. The CFDA numbers listed are 47.041 and 47.070. The posting and creation date were December 30, 2015, with an original and current closing date of March 28, 2016. The program anticipated making around 8 awards, with an award ceiling of up to $1,600,000. Eligibility is listed as "Others" with additional clarification expected in the solicitation’s eligibility section.

Finally, the program is positioned as aligned with broader national initiatives and priorities, including the National Strategic Computing Initiative and the nanotechnology-inspired Grand Challenge for Future Computing. That alignment signals that proposed work is expected to contribute not just to narrow technical improvements, but to longer-term, foundational shifts in how computing systems are designed to deliver sustainable performance under strict energy constraints.

Frequently Asked Questions (FAQs)

What is the Energy-Efficient Computing: from Devices to Architectures opportunity?

It is a joint research grant program focused on advancing energy-efficient computing across the full computing stack, from device-level concepts up through architectures and system/software considerations. The opportunity is identified as NSF Funding Opportunity Number 16-526 and is led by the National Science Foundation (NSF) in partnership with the Semiconductor Research Corporation (SRC).

Which organizations are leading this program?

The program is led by the National Science Foundation (NSF) in partnership with the Semiconductor Research Corporation (SRC).

What problem is this program trying to solve?

The program targets a major bottleneck in modern computing: performance gains are increasingly constrained by the energy required to process, store, and especially move data. Energy consumption, heat, and data-movement costs are limiting progress across platforms ranging from small devices to large-scale systems. The program is positioned around the idea that incremental, conventional improvements are no longer sufficient.

Why does the solicitation emphasize "energy-efficient computing" now?

Because energy use and the resulting heat, along with the growing cost of moving data, are now key limiting factors in how far computing performance can advance. The opportunity frames these constraints as widespread across many classes of computing systems, not confined to one niche domain.

What is the central theme or major emphasis of this solicitation?

The central theme is that disruptive advances are needed across the entire computing stack, not just within one layer such as materials, devices, circuits, architecture, or software. The solicitation stresses that the challenges are interconnected and that isolated breakthroughs may not translate into real-world impact unless they are designed to work together.

What does "across the entire computing stack" mean in this context?

It means the opportunity is interested in innovations spanning multiple levels of the computing hierarchy. Examples of layers mentioned include materials, devices, circuits, architecture, and software. The intent is to encourage approaches that consider how these layers interact rather than improving only one layer in isolation.

What does "simultaneous co-optimization" mean for proposals?

It refers to intentionally designing solutions that work together across layers so the overall platform energy drops in a measurable way. The solicitation describes co-optimization as aligning decisions and innovations across areas such as new device concepts, circuit techniques, architectural dataflow choices, and system/software approaches, rather than treating them as separate efforts.

Is the program looking for incremental improvements or disruptive changes?

The solicitation is framed around the need for genuinely disruptive, revolutionary approaches. It explicitly suggests incremental, conventional improvements are not enough to keep pace with demand under energy constraints.

What computing functions are specifically highlighted for energy reduction?

The opportunity highlights minimizing the energy cost of three core functions: processing data, storing data, and transporting data within future systems.

Why is data transport emphasized so strongly?

The solicitation points to transport because an increasing share of total system energy is being spent on communication, such as moving bits across a chip, between chips, and through memory hierarchies, not just on arithmetic operations.

What kinds of research teams does the program encourage?

The opportunity explicitly encourages cross-disciplinary teams that jointly explore and co-design end-to-end solution paths. Disciplines mentioned include programmers, system architects, circuit designers, chip processing engineers, materials scientists, and computational chemists.

Does the solicitation expect end-to-end thinking rather than isolated components?

Yes. The solicitation argues that the problem is too interconnected for disconnected component advances to reliably produce real-world impact. It calls for integrated, end-to-end solution paths with co-design across layers.

Is collaboration treated as part of the challenge?

Yes. The solicitation frames this as both a technical challenge and an organizational one, stating that solving it will require new models of collaboration that bring together communities that do not always co-design in a tightly integrated way.

What is the grant type/category for this opportunity?

It is described as a discretionary grant opportunity in the Science and Technology and other Research and Development category.

What are the CFDA numbers associated with this opportunity?

The CFDA numbers listed are 47.041 and 47.070.

What is the NSF Funding Opportunity Number?

The NSF Funding Opportunity Number listed is 16-526.

When was the opportunity posted?

The posting (and creation) date is December 30, 2015.

What was the application deadline?

The original and current closing date listed is March 28, 2016.

How many awards were anticipated?

The program anticipated making around 8 awards.

What is the maximum award amount (award ceiling)?

The award ceiling is up to $1,600,000.

Who is eligible to apply?

Eligibility is listed as "Others," with additional clarification expected in the solicitation's eligibility section. The provided summary does not include further detail beyond that.

How does this program relate to national priorities or initiatives?

The opportunity is positioned as aligned with broader national initiatives and priorities, including the National Strategic Computing Initiative and the nanotechnology-inspired Grand Challenge for Future Computing.

What does alignment with national initiatives imply for proposed work?

Based on the solicitation summary, alignment signals that proposed work is expected to contribute to longer-term, foundational shifts in how computing systems are designed, supporting sustainable performance under strict energy constraints rather than only narrow technical improvements.

What kinds of impacts is the program aiming for?

The solicitation emphasizes meaningful reductions in energy across computing platforms by addressing energy, heat, and data movement limitations. It also emphasizes that translating breakthroughs into real-world impact requires integrated advances across multiple layers of the computing stack.

Is the focus limited to a specific platform size (like only mobile or only supercomputers)?

No. The summary describes the constraints as affecting many computing platforms, ranging from small devices to large-scale systems.

Does the opportunity specify any particular layer as the main focus (materials vs. architecture vs. software)?

No single layer is presented as the sole focus. The solicitation explicitly emphasizes that disruptive progress requires advances across multiple layers, coupled through simultaneous co-optimization.

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